Many processing systems require separate circuits that perform operations synchronized with one another. For example, in systems requiring a high degree of reliability, redundant circuits are often synchronized and operated in parallel in a lockstep manner. Lockstep is a technique used to monitor and verify the operation of a system. In typical lockstep operation, two or more processors are synchronized to the same state during system start-up. Following synchronization, the state of the two processors is identical from clock cycle to clock cycle. While processors are operating in identical states, they are said to be operating in lockstep. The processors receive identical input, and the output of each processor is monitored and compared. If a difference between the outputs of the processors is encountered, an error is detected and mitigation techniques can be employed.
One problem encountered in typical lockstep operation is the synchronization of clock signals used by two or more synchronized circuits. If synchronized circuits use separate clocks, the clocks must be synchronized to initialize the circuits to a common state. Even when driven by a common clock, generated signals may arrive at redundant components at different times due to, for example: different lengths of signal lines; material imperfections; or variations in temperature, capacitance, and intermediate devices. Even after synchronization is achieved, clock signals are not perfectly stable and will tend to drift. Along with clocks being synchronized, execution of instructions by the processors must also be synchronized.
As clock signal frequencies employed in integrated circuitry increase, it becomes more difficult to synchronize and maintain lockstep operation on a cycle-by-cycle basis. With processors operating in the gigahertz range and source oscillators operating at a fraction of the processor frequency, it is difficult to align two or more processors in lockstep. Should the processors be physically separated, silicon and board delays can compound the problem. The cycle-by-cycle lockstep operation is generally enforced with an application-specific integrated circuit (ASIC), which imposes a significant increase in hardware overhead as well as design costs.
One or more disclosed embodiments may address one or more of the above issues.